We have built
a number of image processing IP blocks and an optimised system-on-chip architecture.
Our
A-Core chip is the first integrated component that utilizes this technology.
We also offer a number of reference designs
for various target applications.
The Smart Camera: SC-80
- A new low cost smart
camera for industrial, consumer and robotics
The ASIC design: A-Core
- Sensor-to-User Visual Perception Solution
- Can connect to various image/video sources
- Dual RISC core architecture decouples control / processing
- Image/Video
Compression
- Connects directly to Ethernet (IP control/video channels)
- Programmable control of digital I/O (events/alarms)
- Software / API for straightforward implementation of applications
The IP: Vision IP-blocks
- Sensor Interface and Image Processing Cores:
- DPLS_IP01: Image Sensor Interface for On-chip bus &
Block Transfers
- DPLS_IP02: Image Preprocessing Sensor Interface for Feature Extraction
- DPLS_IP03: Blob Detection and Tracking
- DPLS_IP04: Bayer
Demosaicing
- DPLS_IP05: Automatic White Balance
- DPLS_IP12: Color Space Conversion
- DPLS_IP13: Chroma Resampler
- DPLS_IP14: Image Scaler
- We also offer IP blocks for:
- On chip Image Block Transfer i/f with special DMA & Data Flow structures
- Registration for
Stereo Vision and Motion Detection
- Hand Movement (Gesture) Detection
Reference: Complete Application Templates
Click to get Product Briefs for IP cores:
(descriptions of other IP blocks are available upon request)
